1. Field of the Invention
The present invention relates to a semiconductor device having a storage electrode and a manufacturing method thereof.
Priority is claimed on Japanese Patent Application No. 2008-193389, filed Jul. 28, 2008, the content of which is incorporated herein by reference.
2. Description of Related Art
Accompanying developments in miniaturization and high-integration of DRAM, the size of capacitor elements that form a memory cell has also been reduced. Consequently, it is becoming more difficult to ensure a sufficient amount of accumulated charge. In order to improve capacitor capacity, there is a need to expand the surface area of the capacitor elements. Therefore, as a stack type capacitor element, there has been developed a capacitor having a cylindrical (cylinder-shaped) lower electrode.
As capacitor elements become miniaturized, the diameter of the cylinder opening of the cylindrical lower electrode and its surface area is reduced. As a result, the capacitor capacity becomes smaller. Consequently, in order to ensure capacitor capacity, in simple terms, the height of the lower electrode needs to be heightened to thereby increase the surface area.
However, we have now discovered that there has been a problem in that if an attempt is made so that the height of the lower electrode is ensured and a cylinder shape is formed in the deep section of the lower electrode, defects will occur in the dry etching because the aspect ratio of the lower electrode is high. That is to say, etching gas is unlikely to penetrate into the deep section of the lower electrode, and the control of dry etching becomes more difficult. Consequently, there is a possibility that the cylinder opening becomes defective and the shape of the lower electrode becomes unstable. Furthermore, there is a possibility that if the shape of the lower electrode becomes unstable, the lower electrode may collapse, causing a short failure between adjacent electrodes.
Japanese Unexamined Patent Application, First Publication No. 2004-311918 (hereinafter, referred to as Patent Document 1) discloses a semiconductor device in which there is provided a two-stage structure in a lower electrode of a capacitor to thereby enable a reduction in dry etching defects. That is to say, Patent Document 1 discloses a semiconductor device in which, as shown in FIG. 15 of Patent Document 1, in an interlayer insulating film 102 with an etching stopper film 10 formed thereon, there is formed a storage node contact plug 104. This semiconductor device has a capacitor lower electrode 106 having a two-stage structure of a pad-shaped storage node (first storage electrode) 40 formed so as to connect to the storage node contact plug 104, and a cup-shaped storage node (second storage electrode) 70 formed thereon. As a result, the capacitor lower electrode 106 is formed high and the capacitor capacity is ensured, and only the second storage electrode 70 is formed in a cup shape. Therefore, it is alleged to be possible to reduce defects in dry etching, that is, defects in the opening, or defects in the shape of the capacitor lower electrode 106.
However, we have recognized that even in the case of using the two-stage structured capacitor lower electrode 106 shown in FIG. 15 of Patent Document 1, with further miniaturization of the device, the influence of superposition displacement in lithography becomes significant. Therefore, there is a possibility that again defects such as collapse of the capacitor and deterioration in the capacitor characteristic may occur. A problem in the conventional art is more specifically described with reference to FIG. 21. FIG. 21 is illustrated by adding to FIG. 15 of Patent Document 1 which discloses the conventional art a phenomenon which causes the problem discovered by the present inventor.
As shown in FIG. 21, when forming the two-stage structured capacitor lower electrode 106, the positions of the pad-shaped storage node (first storage electrode) 40 and the cup-shaped storage node (second storage electrode) 70 may be displaced from each other in some cases due to superposition displacement in lithography. In this case, there is a problem in that the contact area between the first storage electrode 40 and the second storage electrode 70 is reduced. As a result there is a possibility that the mechanical strength of the capacitor lower electrode 106 is reduced and the second storage electrode 70 consequently collapses, causing short-circuit between the adjacent capacitor lower electrodes. Moreover, there is a possibility that even if a short-circuit does not occur, since stress is applied to the capacitive insulating film that coats the capacitor lower electrode 106, leakage current may increase.